From:  Geoff Oltmans > INTERNET:geoff@sprynet.com
Subj:  Hunting ColecoVision/ADAM Information

Well, I discovered a great new resource for referencing material
related to the ADAM. It seems that IBM has a web site that 
contains copies of the US patent records, including quite a 
number of patents for ColecoVision products. I was able, for 
instance, to find a picture of the ColecoVision block diagram, 
pictures of the Super Action controllers, and the regular hand 
controllers...as well as detailed legalese descriptions of the 
devices.

So, I'm still hunting ADAM information on here. The question I 
need answered is, who designed the ADAM? I was thinking it was 
manufactured and designed by Honeywell, but I'm not sure. Several
peripherals I believe were designed by MPI (whatever that stands 
for). So what might be the result of this? 

Hey, if you've got the patent numbers themselves that might help.

To look for yourself, go to http://www.patents.ibm.com

Another oddity I discovered was that Commodore Electronics held 
the patent for the case of the TRS-80 CoCo2(3?), which makes me 
wonder if they designed the rest of the computer for Radio Shack.

Curious...

*Geoff!*

-- 
Geoff Oltmans - CPE Undergrad University of Alabama in Huntsville




From:  Richard Drushel > INTERNET:drushel@apk.net
Subj:  Re: Hunting ColecoVision/ADAM Information

[Geoff Oltmans] spake unto the ether:
> 
> Well, I discovered a great new resource for referencing mater-
ial related to the ADAM. It seems that IBM has a web site that 
contains copies of the US patent records, including quite a 
number of patents for ColecoVision products. I was able, for 
instance, to find a picture of the ColecoVision block diagram, 
pictures of the Super Action controllers, and the regular hand 
controllers...as well as detailed legalese descriptions of the 
devices.<

        Geoff, this is really interesting...maybe I can find 
some time to look around the site.

> So, I'm still hunting ADAM information on here. The question 
I need answered is, who designed the ADAM? I was thinking it was
manufactured and designed by Honeywell, but I'm not sure. Several
peripherals I believe were designed by MPI (whatever that stands 
for). So what might be the result of this?< 


   A Ph.D. student in our lab, who got his degree about 6 months
after I came in in December 1992, was an ex-electrical engineer
at Hewlett-Packard, and had worked there since 1982.  He told me
once that, while he didn't work on the project, while he was 
there, there was a project to develop something for Coleco, but 
he couldn't quite remember what.  I prompted him with various 
hardware bits, and the Memory I/O Controller (MIOC) chip seemed 
to ring a bell.  This is the 40-pin U6 on the lower circuit 
board...it's a custom LSI chip which sits between the Z80 and 
the ADAMnet Master 6801, manages all the memory map changes
when you write to the bank switch port or hit the ADAM or
ColecoVision reset switch, and generates an 8th address bit for 
DRAM refresh (the Z80, designed in the days when 64K RAM was 
unthinkably expensive, only generates 7 bits of DRAM refresh).

I always wondered how you could reverse-engineer the MIOC; other
than the pin names, and a little bit of text in the ADAM 
Technical Manual, the MIOC is totally undocumented.  Hmm, maybe 
*THAT* is in a patent somewhere...the MIOC is the one piece of 
hardware glue that would be needed to build a new (hardware) 
ADAM system.            *Rich*

Richard F. Drushel, Ph.D.            



From: Richard Drushel <drushel@apk.net>
Subject: Re: Hunting ColecoVision/ADAM Information

[Geoff Oltmans] spake unto the ether:

[Re: the MIOC]

> Do you have a list of the lines used and their respective pins?
> Does the MIOC use the upper nybble of its port for anything?<


     I put this together for you this afternoon, after finding my
also-lost-since-ADAMcon09 "Hacker's Guide to ADAM Vol. II".  
Enjoy.

Pinouts for U7, Memory I/O Controller (MIOC)

NCR 8406C
M446753
(c) 1983 COLECO
R41271

From schematics in "The Hacker's Guide to ADAM Volume II" and
block diagram in "The ADAM Technical Reference Manual".  This 
information does not appear in the form given below anywhere in 
either reference.

/X = active low

 1  Vcc           input   +5V supply
 2  RA7           output  8th bit of DRAM refresh; gated out by
                      /ADDRBUFEN
 3  BA15          input   bus address bit 15
 4  BA14          input   bus address bit 14
 5  BA13          input   bus address bit 13
 6  /CVRST        input   ColecoVision reset switch
 7  BD0           I/O     bus data bit 0
 8  BD1           I/O     bus data bit 1
 9  BD2           I/O     bus data bit 2
10  BD3           I/O     bus data bit 3
11  /BWR'         input   made by complex logic from MA5, /IORQ,
and A10
12  BA6           input   bus address bit 7
13  BA7'          input   BA7, gated in by /ADDRBUFEN
14  /IORQ         input   Z80 control signal
15  /WAIT         input   Z80 control signal
16  /BUSAK        input   Z80 control signal
17  /DMA          input   asserted by Master 6801 to access Z80
                          RAM
18  /BUSRQ        output  Z80 control signal
19  /EOS_ENABLE   output  selects/deselects EOS ROM
20  /NET_RST      output  reset signal for ADAMnet
21  GND           ---     ground
22  /AUX_DECODE1  output  selects/deselects OS-7 ROM
23  /RST          output  reset signal for the Master 6801
24  /CPRST        ???     not connected on schematic; reset for
                          something
25  /PBRST        input   ADAM reset switch
26  /AUX_ROM_CS   output  selects/deselects expansion ROM (center
slot)
27  /ADDRBUFEN    output  enables/disables /BRD, /BWR, /BRFSH,
                          /BMREQ, /BM1, and /BIORQ (disabled 
                          during DMA cycle)
28  /BOOT_ROM_CS  output  selects/deselects SmartWriter ROM
29  /245EN        output  enables/disables BD0-BD7 (disabled 
                          during DMA cycle)
30  /IS3          output  input to Master 6801
31  /OS3          input   output from Master 6801
32  /BMREQ        input   Z80 control signal
33  /BRD          input   Z80 control signal
34  /BRFSH        input   Z80 control signal
35  /BM1          input   Z80 control signal
36  B(phi)        input   Z80 clock
37  MUX           output  multiplexing signal, DRAM refresh
38  /RAS1         output  row address strobe, DRAM refresh, base
                          64K RAM
39  /CAS1         output  column address strobe, DRAM refresh,
                          base 64K RAM
40  /CAS2         output  column address strobe, DRAM refresh,
                          64K XRAM

> Question: Does the 6801 have access to all 64K of the ADAM's
RAM?<


  Experiments by Chris Braymen indicate that the answer is "yes".
After all, the PCB can be relocated to anywhere in the base 64K
or RAM.

(Note:  PCB=Processor Control Block, the start of the RAM area
where ADAMnet RAM DMA takes place).

In fact, even if the Z80 memory map has swapped out the lower32K
/upper32K RAM bank which has the current PCB, the master 6801 
can still do its DMA to the base RAM.  It cannot, however, do 
DMA to any XRAM.

        *Rich*
-- 
Richard F. Drushel, Ph.D.            


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